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MP2316 19v, 3a, 40a i q , high-efficiency constant on-time (cot) step-down converter in 2x3mm qfn package MP2316 rev. 1.11 www.monolithicpower.com 1 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. the future of analog ic technology description the MP2316 is a fully-integrated, high efficiency, synchronous, step-down switch-mode converter, featuring only 40 a quiescent current. this very compact device achieves 3a continuous output current over a wide input supply range with excellent load and line regulation, and can operate with high efficiency over a wide output current load range. it?s optimized for battery- operated applications and applications requiring high light load efficiency. with constant on-time control, the MP2316 provides very fast transient response, easy loop design as well as very tight output regulation. full protection features include scp, ocp, uvp, and thermal shutdown. the MP2316 requires a minimal number of readily available standard external components with a space saving 2mmx3mm 14-pin qfn package. features ? 4v to 19v operating input range ? 3a output current ? 40 a quiescent current ? output adjustable from 0.6v ? 90m ? /30m ? high side/low side r ds(on) for internal power mosfets ? power good indicator ? programmable soft-start time ? forced pwm or auto pfm/pwm mode selectable ? programmable switching frequency ? thermal shutdown ? short circuit protection: hiccup mode ? available in qfn14 (2mmx3mm) package applications ? tablet pcs ? solid state drives ? gaming ? battery-operated applications a ll mps parts are lead-free, halogen free, and adhere to the rohs directive. fo r mps green status, please visit mps website under quality assurance. ?mps? and ?the future of analog ic technology? are registered trademarks of monolithic power systems, inc. typical application
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 2 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. ordering information part number* package top marking MP2316gd qfn-14 (2mmx3mm) see below * for tape & reel, add suffix ?z (e.g. MP2316gd?z); top marking afj: product code of MP2316gd; y: year code; lll: lot number; package reference top view qfn-14 (2mmx3mm)
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 3 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. absolute maxi mum ratings (1) v in .............................................................. +21v v sw ...?0.3v (-5v<10ns) to v in +0.3v (23v<10ns) v bst ........................................................ v sw +6v all other pins .............................. ?0.3v to +6v (2) continuous power dissipation (3) qfn-14 (2mmx3mm) ................................. 1.8w junction temperature ............................. +150 o c lead temperature .................................. +260 o c storage temperature ................ -65 o c to +150 o c recommended operating conditions (4) supply voltage v in .............................. 4v to 19v output voltage v out ............. 0.6v to vin*d max (5) operating junction temp. ....... -40c to +125c thermal resistance (6) ja jc qfn-14 (2mmx3mm)????70??15?c/w notes: 1) exceeding these ratings may damage the device 2) about the details of en pin?s abs max rating, please refer to enable control section. 3) the maximum allowable power dissipation is a function of the maximum junction temperature t j (max), the junction-to- ambient thermal resistance ja , and the ambient temperature t a . the maximum allowable continuous power dissipation at any ambient temperature is calculated by p d (max) = (t j (max)-t a )/ ja . exceeding the maximum allowable powe r dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown. internal thermal shutdown circuitry protects the device from permanent damage. 4) the device is not guaranteed to function outside of its operating conditions. 5) about the dmax, see ?application when input voltage is closed to output voltage? for more information. 6) measured on jesd51-7, 4-layer pcb.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 4 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. electrical characteristics v in = 12v, t j =-40c to +125c (7) , typical value is tested at t j =+25c, unless otherwise noted. parameters symbol condition min typ max units supply current (shutdown) i in v en = 0v 0.1 1 a supply current (quiescent) i q v en = 5v, t j = 25c, v fb = 0.9v 40 55 a vin under-voltage lockout threshold rising inuv vth 3.5 3.7 3.9 v vin under-voltage lockout threshold hysteresis inuv hys 200 mv hs switch-on resistance hs rds-on 90 m ? ls switch-on resistance ls rds-on 30 m ? switch leakage sw lkg v en = 0v, v sw = 0v or 12v 0 1 a high side fet current limit (8) i limit_hs duty=10% 5 a low side fet current limit i limit_ls force pwm mode, sink current 1.5 a one-shot on time (8) t on r freq =180k from freq/mode pin to vin 230 ns minimum on time (8) t on_min 90 ns minimum off time t off min 150 ns feedback voltage v fb t j = 25c 594 6 00 606 mv t j =-40c to +125c 591 600 609 feedback current i fb v fb = 700mv 10 50 na soft start current i ss 4 8 11 a en input high voltage v en h 1.6 v en input low voltage v en l 0.4 v en input current i en v en = 2v 2 a v en = 0v 0 power-good rising threshold pg vth-hi 0.9 v fb power-good falling threshold pg vth-lo 0.85 v fb power-good delay pg td 140 s power-good sink current capability v pg sink 1ma 0.4 v power-good leakage current i pg leak v pg = 3.3v 50 na thermal shutdown (8) t sd 150 c thermal shutdown hysteresis (8) t sd-hys 20 c notes: 7) not tested in production. guaranteed by over-temperature correlation. 8) guaranteed by design and engineering sample characterization. .
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 5 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e charactoristics v in =12v, v out =1.2v, l=2.2 h, t a =25 o c, unless otherwise noted.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 6 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e charactoristics (continued) v in =12v, v out =1.2v, l=2.2 h, t a =25 o c, unless otherwise noted.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 7 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e charactoristics (continued) v in =12v, v out =1.2v, l=2.2 h, t a =25 o c, unless otherwise noted.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 8 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e charactoristics (continued) v in =12v, v out =1.2v, l=2.2 h, t a =25 o c, unless otherwise noted.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 9 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical performanc e charactoristics (continued) v in =12v, v out =1.2v, l=2.2 h, t a =25 o c, unless otherwise noted.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 10 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. pin functions package pin # name description 1,12 gnd system ground. these pins are the refere nce ground for the regulated output voltage, and require special consideration during pcb layout. 2, 13 sw switch output. connect using wide pcb traces. 3, 14 vin supply voltage. the MP2316 operates from a +4v to +19v input rail. c1 is needed to decouple the input rail. use wide pcb traces and multiple vias to make the connection. 4 freq/mode frequency set during ccm operation. connect a resistor to vin to set the switching frequency and part works at forced pwm mode. connect a resistor to gnd to set the switching frequency and part works at auto pfm/pwm mode. don?t float this pin. 5 pg power-good output. the output of this pin is an open drain that goes high if the output voltage is higher than 90% of the nominal vo ltage. there is a 40s delay between when fb 90% and when the pg pin goes high. 6 ss soft start. connect a capacitor across ss and gnd to set the soft-start time to avoid start up inrush current. 7 fb feedback. sets the output voltage when connec ted to the tap of an external resistor divider that is connected between output and gnd. 8 cr internal ramp adjust. connect a capacitor from vout to this pin to adjust the internal ramp amplitude. this can be used to improve the transient performance. 9 en en = 1 to enable the MP2316. for automatic start-up, connect en pin to vin with a pull-up resistor. 10 bst bootstrap requires a capacitor connected between sw and bst pins to form a floating supply across the high-side switch driver. 11 vcc internal bias supply. internal 5v ldo outpu t. decouple with a 1f ceramic capacitor as close to the pin as possible.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 11 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. functional block diagram figure 1?functional block diagram
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 12 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. operation pwm operation the MP2316 is a fully-integrated, synchronous, rectified, step-down switch converter. the device uses constant-on-time (cot) control to provide fast transient response and easy loop compensation. figure 2 shows the simplified ramp compensation block in MP2316, at the beginning of each cycle, the high-side mosfet (hs-fet) turns on whenever the ramp voltage (v ramp ) is lower than the error amplifier output voltage (v eao )?which indicates insufficient output voltage. the input voltage and the frequency-set resistor determine the high-side mosfet turn-on timer (t on ). after the on period elapses, the hs-fet enters the off state. by cycling hs-fet between the on and off states, the converter regulates the output voltage. the integrated low-side mosfet (ls-fet) turns on when the hs-fet is in its off state to minimize the conduction loss. shoot-through occurs when there is both hs-fet and ls-fet are turned on at the same time, causing a dead short between input and gnd. shoot-through dramatically reduces efficiency, and the MP2316 avoids this by internally generating a dead-time (dt) between hs-fet is off and ls-fet is on, ls-fet is off and hs-fet is on. the device enters either heavy-load operation or light-load operation depending on the output current. figure 2?simplified ramp compensation block mode selection as shown in figure 3, connecting a resistor (r6) from freq/mode pin to vin can set the switching frequency and meanwhile, the part will work at forced pwm mode. connect a resistor (r7) from freq/mode pin to gnd can set the switching frequency and meanwhile the part works at auto pfm/pwm mode. figure 3?mode selection switching frequency MP2316 uses constant-on-time (cot) control and there is no dedicated oscillator in the ic. the input voltage is feed-forwarded to the on-time one-shot timer through the frequency resistor, the duty ratio is kept as v out /v in , and the switching frequency is fairly constant over the input voltage range. the approximate typical switching frequency can be determined with the following equation: 6 sw in on out 10 f(khz) v(v) t(ns) v(v) ? ? (1) t on will be slightly different at forced pwm mode and auto pfm/pwm mode. the approximate typical ton formula is shown below: forced pwm mode: freq on _ pwm delay _ pwm in 14.5 r (k ) tt(ns) v(v) 0.4 ? ? ?? ? (2) auto pfm/pwm mode, freq on _ pfm delay _ pfm in 13 r (k ) tt(ns) v(v) 0.4 ? ? ?? ? (3) where t delay_pwm and t delay_pfm are the comparator delay, and the typical value equals approximately 15ns and 10ns respectively when part enters ccm mode, the duty ratio will change slightly from light load to full load due to power loss. so the frequency will change a little from light load to full load even in ccm mode. because of the minimum on time and minimum off time, switching frequency is limited. the
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 13 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. maximum frequency can be calculated by the following equations, choose the lower value of them as the maximum frequency: 6 sw-max in on-min out 10 f(khz) v(v) t(ns) v(v) ? ? (4) 6 in out sw-max off-min in (v (v)-v (v)) 10 f(khz) t(ns)v(v) ? ? ? (5) where ton-min typical value is 90ns and toff- min typical value is 150ns.for example, vin=12v, vout=1.2v, the maximum frequency we can set is about 1.1mhz. MP2316 is optimized to operate at high switching frequency with high efficiency. high switching frequency makes it possible to use small-sized lc filter components to save system pcb space. forced pwm operation whenever v ramp drops below v eao , the hs-fet is turned on v in t on is constant v ramp v eao i out v sw hs-fet driver ls-fet driver i l figure 4?force pwm operation when the MP2316 works in forced pwm, the MP2316 enters continuous-conduction mode (ccm) where the hs-fet and ls-fet repeat the on/off operation, even if the inductor current goes to zero or negative value. the switching frequency (f sw ) is fairly constant. figure 4 shows the timing diagram during this operation. light-load operation when the MP2316 works in auto pfm/pwm mode and during light-load operation?the MP2316 automatically reduces the switching frequency to maintain high efficiency, and the inductor current drops near zero. when the inductor current reaches zero, the ls-fet driver goes into tri-state (high z). hence, the output capacitors discharge slowly to gnd through ls- fet, r1, and r2. this operation greatly improves device efficiency when the output current is low. figure 5?light load operation light-load operation is also called skip mode because the hs-fet does not turn on as frequently as during heavy-load conditions. the frequency at which the hs-fet turns on is a function of the output current?as the output current increases, the time period that the current modulator regulates becomes shorter, and the hs-fet turns on more frequently. the switching frequency increases in turn. the output current reaches the critical level when the current modulator time is zero, and can be determined using the following equation: in out out out sw in (v v ) v i 2lf v ?? ? ? ?? (6) the device reverts to pwm mode once the output current exceeds the critical level. after that, the switching frequency stays fairly constant over the output current range. application when input voltage is close to output voltage. MP2316 extends the on time when output voltage loses regulation when input voltage is close to output voltage. the switching frequency drops correspondingly in order to achieve larger duty cycle to keep output regulated. if the vin is very close to vout, ton extension circuit will force MP2316 working in pwm mode with higher than expected frequency. increasing vin to certain level, part will exit this mode. refer to figure 6, MP2316 can work at auto pfm/pwm mode when vin is above the curve. if auto pfm/pwm mode is required at input voltage below the curve, use enable startup instead of input voltage startup.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 14 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. figure 6?v in startup min v in vs. v out to guarantee auto pfm/pwm mode work well floating driver and bootstrap charging an external bootstrap capacitor powers the floating power mosfet driver. this floating driver has its own uvlo protection. this uvlo?s rising threshold is 2.2v with a hysteresis of 150mv. the bootstrap capacitor voltage is regulated internally by v in through d1, m1, cb, l1 and c2a (figure 7). if (v in -v sw ) exceeds 5v, u1 will regulate m1 to maintain a 5v bst voltage across cb. figure 7?bootstrap charging circuit ramp with small esr output capacitor when the output capacitors are ceramic ones, the esr ripple is not high enough to stabilize the system, the external ramp compensation is needed. figure 8?simplified external ramp circuit in pwm mode with small esr cap figure 8 shows a simplified external ramp compensation for pwm mode. chose the external ramp cr to meet the following condition: fb sw r 11 r 2f c 5 ? ?? ? (7) where, r fb is set to 90k internally. then: rramp cr rfb cr i = i + i i ? (8) and the vramp on the v cr can be estimated as: in out ramp on ramp r vv vt rc ? ?? ? (9) where, r ramp is set to 900k internally. as can be seen from equation 9, if there is instability in pwm mode, we can reduce cr. if cr cannot be reduced further due to limitation from equation 7, then we can add an external resistor between sw and cr to reduce the equivalent rramp. typically set vramp to about 20-40mv for a stable pwm operation. table 1 below is recommended cr value for different output voltages. the recommended cr value in table 1 is based on 500khz switching frequency, selected output inductor and 22f output capacitors.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 15 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. table 1?cr selection for common output voltages v out (v) l( h) cr(pf) v in =12v v in =5v 1.0 2.2 82 82 1.2 2.2 100 100 1.5 3.3 120 82 1.8 3.3 120 56 2.5 3.3 150 56 3.3 4.7 150 56 5 4.7 100 56 (8) notes: 9) when vout=5v, vin should be higher than 6v. cr value may need change with different input voltage, output voltage, output inductor, output capacitor and frequency set. if the design spec is not the same as table 1 spec, cr value is needed to be adjusted accordingly. take equation 9 as design guide. in skip mode, the stability mainly determined by the ripple of v eao , a reasonable vramp chosen in pwm operation is generally ok for skip mode. soft start MP2316 employs a soft start (ss) mechanism to ensure smooth output ramping during power up. when the en pin goes high, an internal current source (8 a) charges up the ss capacitor. the ss capacitor voltage takes over the ref voltage to the pwm comparator. the output voltage smoothly ramps up with the ss voltage. once ss voltage rises above the v ref , it continues to ramp up ref voltage takes over. at this point, the soft start finishes and it enters steady state operation. the ss capacitor value can be determined as follows: ss ss ss ref t(ms) i(ua) c(nf) v(v) ? ? (10) if the output capacitance is large value, it is not recommended to set the ss time too short. otherwise, it?s easy to hit the current limit during ss. a minimum value of 4.7nf is recommended if the output capacitance is larger than 330 f. pre-bias startup the MP2316 has been designed for monotonic startup into pre-biased loads. if the output is pre- biased to a certain voltage during startup, the bst voltage will be refreshed and charged, the voltage on the soft-start capacitor will be charged too. if bst voltage exceeds its rising threshold voltage and soft-start capacitor voltage exceeds the sensed output voltage at the fb pin, the part starts to work. power-good (pg) the pg pin is an open drain output. pg requires a pull up resistor (eg. 100k). pg pin is pulled to gnd before ss is ready. after fb voltage reaches 90% of v ref , the pg pin is pulled high after a 140 s delay. when the fb voltage drops below 85% of v ref , the pg pin will be pulled low. over-current protection (ocp) and short- circuit protection (scp) MP2316 has cycle-by-cycle over-current limit control. during hs-fet on state, the inductor current is monitored. when the sensed inductor current hits the peak current limit, the hs limit comparator (shown in figure 1) is triggered, the device enters over-current protection mode immediately, turns off hs-fet and turns on ls- fet. meanwhile, the output voltage drops until vfb is below the under-voltage (uv) threshold? typically 50% below the reference. once uv is triggered, the MP2316 enters hiccup mode to periodically restart the part. during over-current protection, the device tries to recover from over-current fault with hiccup mode, that means the chip will disable output power stage, discharge soft-start cap and then automatically try to soft-start again. if the over- current condition still holds after soft-start ends, the device repeats this operation cycle till over- current condition disappears and then output rises back to regulation level. the ocp is non- latch protection.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 16 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. enable control en is a digital control pin that turns the regulator on and off. drive en high to turn on the regulator; drive it low to turn it off. an internal 1m ? resistor from en to gnd allows en to be floated to shut down the chip. the en pin is clamped internally using a 6.5v series-zener-diode. connecting the en input pin through a pullup resistor to the voltage on the v in pin. the pull up resistance needs to be large enough to limit the en pin current less than 100a. for example, with 12v connected to vin, r pullup (12v ? 6.5v) 100a = 55k ? . connecting the en pin directly to a voltage source without any pullup resistor requires limit the amplitude of the voltage less than 6v to prevent damage to the zener diode. uvlo protection MP2316 has under-voltage lock-out protection (uvlo). when the input voltage is higher than the uvlo rising threshold voltage, the MP2316 powers up. it shuts off when the input voltage is lower than the uvlo falling threshold voltage. this is non-latch protection. thermal shutdown the MP2316 employs thermal shutdown by internally monitoring the junction temperature of the ic. if the junction temperature exceeds the threshold value (typically 150oc), the converter shuts off. this is non-latch protection. there is about 20oc hysteresis. once the junction temperature drops below 130oc, it initiates start up.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 17 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. application information component selection setting the output voltage the external resistor divider is used to set the output voltage. first, choose a value for r2. r2 should be chosen reasonably, a small r2 will lead to considerable quiescent current loss while too large r2 makes the fb noise sensitive. it is recommended to choose a value within for r2. typically, set the current through r2 between will make a good balance between system stability and also the no load loss. then r1 is determined as follow: out ref ref vv r1 r2 v ? ?? (11) where the v ref is 0.6v typically. the feedback circuit is shown as figure 9. figure 9?feedback network table 2 lists the recommended resistors value for common output voltages. table 2?resistor selection for common output voltages (9) v out (v) r1(k ? ) r2(k ? ) 1.0 27 40.2 1.2 40.2 40.2 1.5 60.4 40.2 1.8 80.6 40.2 2.5 127 40.2 3.3 182 40.2 5 294 40.2 notes: 10) the feedback resistors in table 2 are optimized for 500khz switching frequency. the detailed schematics are shown on the typical application circuit section. setting the frequency refer to mode selection section. set the forced pwm mode switching frequency by connecting a resistor r6 from vin to freq/mode pin and leaving r7 ns. the r6 is determined as follows: ?? 6 delay _ pwm in sw in vo 10 t (ns) v 0.4 f(khz)v r6(k ) 14.5 ?? ? ??? ?? ? ?? ?? (12) where t delay_pwm is about 15ns. figure 10?r6 vs. forced pwm mode switching frequency set the auto pfm/pwm mode switching frequency by connecting a resistor r7 from freq/mode pin to ground and leaving r6 ns. the r7 is determined as follow: ?? 6 delay _ pfm in sw in vo 10 t (ns) v 0.4 f(khz)v r7(k ) 13 ?? ? ??? ?? ? ?? ?? (13) where t delay_pfm is about 10ns. figure 11?r7 vs. auto pfm/pwm mode switching frequency
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 18 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. equation 12 and 13 are the typical switching frequency calculation formula. the actually frequency will change a little at different load currents and different input voltages as described before. selecting the inductor the inductor is necessary to supply constant current to the output load while being driven by the switched input voltage. a larger-value inductor will result in less ripple current that will result in lower output ripple voltage. however, a larger-value inductor will have a larger physical footprint, higher series resistance, and/or lower saturation current. a good rule for determining the inductance value is to design the peak-to- peak ripple current in the inductor to be in the range of 30% to 40% of the maximum output current, and that the peak inductor current is below the maximum switch current limit. the inductance value can be calculated by: out out sw l in vv l(1) fi v ??? ?? (14) where ? i l is the peak-to-peak inductor ripple current. the inductor should not saturate under the maximum inductor peak current, where the peak inductor current can be calculated by: out out lp out sw in vv ii (1 ) 2f l v ?? ?? ? (15) selecting the input capacitor the input current to the step-down converter is discontinuous and therefore requires a capacitor to supply the ac current to the step- down converter while maintaining the dc input voltage. ceramic capacitors are recommended for best performance and should be placed as close to the vin pin as possible. capacitors with x5r and x7r ceramic dielectrics are recommended because they are fairly stable with temperature fluctuations. the capacitors must also have a ripple current rating greater than the maximum input ripple current of the converter. the input ripple current can be estimated as follows: out out cin out in in vv ii (1 ) vv ?? ?? (16) the worst-case condition occurs at v in = 2v out , where: out cin i i 2 ? (17) for simplification, choose the input capacitor with an rms current rating greater than half of the maximum load current. the input capacitance value determines the input voltage ripple of the converter. if there is an input voltage ripple requirement in the system, choose the input capacitor that meets the specification. the input voltage ripple can be estimated as follows: out out out in sw in in in iv v v(1) fc v v ?? ? ?? ? (18) under worst-case conditions where v in = 2v out : out in sw in i 1 v 4f c ??? ? (19) selecting the output capacitor the output capacitor is required to maintain the dc output voltage. ceramic or poscap capacitors are recommended. the output voltage ripple can be estimated as: out out out esr sw in sw out vv 1 v(1)(r ) fl v 8fc ?? ?? ? ? ??? (20) in the case of ceramic capacitors, the impedance at the switching frequency is dominated by the capacitance. the output voltage ripple is mainly caused by the capacitance. for simplification, the output voltage ripple can be estimated as: out out out 2 sw out in vv v(1) 8f lc v ?? ?? ??? (21) the output voltage ripple caused by esr is very small. therefore, an external ramp is needed to stabilize the system. the external ramp can be generated through the capacitor cr. in the case of poscap capacitors, the esr dominates the impedance at the switching frequency. for simplification, the output ripple can be approximated as:
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 19 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. out out out esr sw in vv v(1)r fl v ?? ?? ? ? (22) besides considering the output ripple, chose larger output capacitor also can get better load transient response, but maximum output capacitor limitation should be also considered in design application. if the output capacitor value is too high, the output voltage can?t reach the design value during the soft-start time, and then it will fail to regulate. the maximum output capacitor value c o_max can be limited approximately by: o_max lim_avg out ss out c(i i)t/v ??? (23) where, i lim_avg is the average start-up current during soft-start period. t ss is the soft-start time. external bootstrap diode bst voltage may become insufficient at some particular conditions. in this case an external bootstrap diode can enhance the efficiency of the regulator and help to avoid bst voltage insufficient at light load pfm operation. the bst voltage insufficient is more likely to happen at given either of the following conditions: ? v in is low ? duty cycle is large: d= in out v v >65% in these cases, if bst voltage insufficient happens the output ripple voltage may become extremely large at light load condition or bad efficiency at heavy load condition, add an external bst diode from the vcc pin to bst pin, as shown in figure 12. figure 12: optional external bootstrap diode the recommended external bst diode is in4148. pc board layout proper layout of the switching power supplies is very important, and sometimes critical for proper function. poor layout design can result in poor line or load regulation and stability issues. please follow these guidelines and take figure 13 as reference: 1 the high current paths (gnd, in and sw) should be placed very close to the device with short, direct and wide traces. 2 the input capacitor needs to be as close as possible to the in and gnd pins. 3 the mode/frequency circuit should be placed closed to the part. 4 the external feedback resistors should be placed next to the fb pin. 5 keep the switching node sw short and away from the feedback network. in order to have better performances, it is better to use four layers boards. figure 13 shows the top and bottom layers (inner 1 and inner 2 are all gnd). bst gnd 1 2 3 4 5 6 7 8 9 10 11 12 sw sw vin vin freq p g f b ss c r e n vcc gnd cr r4
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 20 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. gnd sw vout vin vcc figure 13? sample board layout design example a design example is provided below when the ceramic capacitors are applied: v in 12v v out 1.2v i out 3a the detailed application schematic is showed in figure 15. the typical performance and waveforms have been showed in the typical characteristics section. for more devices applications, please refer to the related evaluation board datasheet.
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 21 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. typical application circuits note: use r6=130k and not use r7 to set forced pwm, use r7=1 47k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 14? v in =12v, v out =1.0v, i out =3a, f s =500khz MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst gnd vout 1.2v/3a gnd c1a 0.1uf c2a 22uf r5 100k r6 ns r7 180k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 2.2uh cr 100pf r1 40.2k r2 40.2k c1 22uf r4 ns vin note: use r6=158k and not use r7 to set forced pwm, use r7=1 80k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 15? v in =12v, v out =1.2v, i out =3a, f s =500khz
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 22 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst gnd vout 1.5v/3a gnd c1a 0.1uf c2a 22uf r5 100k r6 ns r7 220k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 3.3uh cr 120pf r1 60.4k r2 40.2k c1 22uf r4 ns vin note: use r6=196k and not use r7 to set forced pwm, use r7=2 20k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 16? v in =12v, v out =1.5v, i out =3a, f s =500khz MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst gnd vout 1.8v/3a gnd c1a 0.1uf c2a 22uf r5 100k r6 ns r7 255k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 3.3uh cr 120pf r1 80.6k r2 40.2k c1 22uf r4 ns vin note: use r6=243k and not use r7 to set forced pwm, use r7=2 55k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 17? v in =12v, v out =1.8v, i out =3a, f s =500khz
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 23 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst gnd vout 2.5v/3a gnd c1a 0.1uf c2a 22uf r5 100k r6 ns r7 360k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 3.3uh cr 150pf r1 127k r2 40.2k c1 22uf r4 ns vin note: use r6 =348k and not use r7 to set forced pwm, use r7= 360k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 18? v in =12v, v out =2.5v, i out =3a, f s =500khz MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst gnd vout 3.3v/3a gnd c1a 0.1uf c2a 22uf r5 100k r6 ns r7 499k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 4.7uh cr 150pf r1 182k r2 40.2k c1 22uf r4 ns vin note: use r6=453k and not use r7 to set forced pwm, use r7=4 99k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 19? v in =12v, v out =3.3v, i out =3a, f s =500khz
MP2316 ? 19v, 3a low i q step down converter MP2316 rev. 1.11 www.monolithicpower.com 24 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. MP2316 3, 14 1, 12 5 11 4 9 2, 13 8 7 6 10 vin en freq/mode vcc pg gnd ss fb cr sw bst vout 5v/3a gnd c1a 22uf c2a 22uf r5 100k r6 ns r7 787k r3 100k c4 1uf c3 15nf cb 0.1uf rb 0 l 4.7uh cr 100pf r1 294k r2 40.2k c1 0.1uf r4 ns note: use r6=715k and not use r7 to set forced pwm, use r7=7 87k and not use r6 to set auto pfm/pwm. the recommended r6, r7 value are basing on equation 12, 13 and optimized according to test result. figure 20? v in =12v, v out =5v, i out =3a, f s =500khz
MP2316 ? 19v, 3a low i q step down converter notice: the information in this document is subject to change wi thout notice. users should warra nt and guarantee that third party intellectual property rights are not infringed upon w hen integrating mps products into any application. mps will not assume any legal responsibility for any said applications. m2316 rev. 1.11 www.monolithicpower.com 25 4/11/2017 mps proprietary information. patent protec ted. unauthorized photocopy and duplication prohibited. ? 2017 mps. all rights reserved. package information qfn-14 (2mmx3mm) 1) all dimensions are in millimeters. 2) exposed paddle size does not include mold flash. 3) lead coplanarity shall be 0.10 millimeters max. 4) jedec reference is mo-220. 5) drawing is not to scale.

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